Vojta Mrazek 71a1d45045

string description (#15)

2023-02-22 09:45:14 +01:00

..

arithmetic_circuits

string description (#15)

2023-02-22 09:45:14 +01:00

logic_gate_circuits

Bitwise and operation fix.

2021-10-10 00:02:58 +02:00

one_bit_circuits

Bitwise and operation fix.

2021-10-10 00:02:58 +02:00

__init__.py

Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits.

2021-04-21 11:33:07 +02:00

cgp_circuit.py

Added new (approximate) multiplier architectures and did some minor changes regarding sign extension for c output formats.

2022-04-17 13:04:17 +02:00