6 Commits

Author	SHA1	Message	Date
honzastor	ad1c6ec557	Updated circuits documentation.	2021-04-21 13:42:07 +02:00
honzastor	8e950fc51f	Optimized circuits generation, refactored code, fixed cla, added new csa, array divider circuits and create yosys equivalence check script. TBD: Documentation and sample generated circuits.	2021-04-21 11:33:07 +02:00
honzastor	068def0226	Added documentation of classes methods.	2021-04-06 01:39:11 +02:00
honzastor	a336a683e7	Added some code documentation and updated git action to generate it.	2021-03-31 04:40:54 +02:00
Jan Klhůfek	82d2d02ef5	Delete ariths_gen/one_bit_circuits/logic_gates/__pycache__ directory	2021-03-30 03:13:15 +02:00
honzastor	69e2514852	Updated project's structure. Renamed class names to properly fit Python naming convention. TBD: proper documentation.	2021-03-30 03:04:48 +02:00