diff --git a/ariths_gen/one_bit_circuits/logic_gates/logic_gates.py b/ariths_gen/one_bit_circuits/logic_gates/logic_gates.py
index 5c95bd4..2ad7351 100644
--- a/ariths_gen/one_bit_circuits/logic_gates/logic_gates.py
+++ b/ariths_gen/one_bit_circuits/logic_gates/logic_gates.py
@@ -108,7 +108,7 @@ class NandGate(TwoInputInvertedLogicGate):
         self.gate_type = "nand_gate"
         self.cgp_function = 5
         self.operator = "&"
-        self.dual_gate = NOrGate
+        self.dual_gate = NorGate
 
         # Logic gate output wire generation based on input values
         # If constant input is present, logic gate is not generated and corresponding