input as output works

ariths_gen/multi_bit_circuits/cgp_circuit.py

@@ -46,7 +46,7 @@ class UnsignedCGPCircuit(GeneralCircuit):
 
         assert sum(
             input_widths) == c_in, f"CGP input widht {c_in} doesn't match input_widhts {input_widths}"
-        assert c_rows == 1, f"Only one-row CGP is supported {c_rows}x{c_cols}"
+        #assert c_rows == 1, f"Only one-row CGP is supported {c_rows}x{c_cols}"
 
         inputs = [Bus(N=bw, prefix=f"input_{chr(i)}")
                   for i, bw in enumerate(input_widths, start=0x61)]
@@ -102,7 +102,9 @@ class UnsignedCGPCircuit(GeneralCircuit):
 
         # output connection
         for i, o in enumerate(map(int, cgp_outputs.split(","))):
-            self.out.connect(i, self._get_wire(o))
+            w = self._get_wire(o)
+            #print(i, o, w, w.name)
+            self.out.connect(i, w)
 
     def _get_wire(self, i):
         if i == 0:

ariths_gen/wire_components/wires.py

@@ -38,6 +38,14 @@ class Wire():
         """
         if self.is_const():
             return f"({self.c_const}) << {offset}\n"
+       #else:
+        #    return f"(({self.name} >> 0) & 0x01) << {offset}\n"
+
+            
+        # If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
+        # then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
+        if self.name.endswith("["+str(self.index)+"]") and self.parent_bus is not None:
+            return f"(({self.prefix} >> {self.index}) & 0x01) << {offset}\n"
         else:
             return f"(({self.name} >> 0) & 0x01) << {offset}\n"
 

tests/test_all.py

@@ -88,6 +88,7 @@ def test_unsigned_mul():
 
     for c in [ UnsignedDaddaMultiplier, UnsignedArrayMultiplier, UnsignedWallaceMultiplier]:
         mul = c(a, b)
+        assert mul(0, 0) == 0
         r = mul(av, bv)
         np.testing.assert_array_equal(expected, r)
 
@@ -105,6 +106,7 @@ def test_signed_mul():
     for c in [ SignedDaddaMultiplier, SignedArrayMultiplier, SignedWallaceMultiplier]:
         mul = c(a, b)
         r = mul(av, bv)
+        assert mul(0, 0) == 0
 
         # r[r >= 2**(2*N-1)] -= 2**(2*N)  # hack!!! two's complement not implemented yet
         np.testing.assert_array_equal(expected, r)

tests/test_cgp.py

@@ -63,6 +63,11 @@ def test_cgp_unsigned_add():
         print(o.getvalue())
 
         r = add2(av, bv)
+
+
+        assert add(0, 0) == 0
+        assert add2(0, 0) == 0
+
         np.testing.assert_array_equal(expected, r)
 
 
@@ -86,6 +91,9 @@ def test_cgp_signed_add():
         add2 = SignedCGPCircuit(cgp_code, [N, N])
         r = add2(av, bv)
 
+        assert add(0, 0) == 0
+        assert add2(0, 0) == 0
+
         # r[r >= 2**(N)] -= 2**(N+1)   # hack!!! two's complement not implemented yet
         np.testing.assert_array_equal(expected, r)
 
@@ -128,4 +136,11 @@ def test_signed_mul():
         mul2 = SignedCGPCircuit(cgp_code, [N, N])
         r = mul2(av, bv)
 
-        np.testing.assert_array_equal(expected, r)
+        np.testing.assert_array_equal(expected, r)
+
+def test_cgp_variant1():
+    # one input is connected to the output (first bit)
+    cgp = "{16,9,37,1,2,1,0}([18]15,12,1)([19]7,7,4)([20]3,12,5)([21]17,3,0)([22]8,14,3)([23]15,3,6)([24]14,0,2)([25]9,9,5)([26]17,13,1)([27]12,13,0)([28]7,16,8)([29]12,11,0)([30]5,13,3)([31]5,13,2)([32]30,12,5)([33]30,29,2)([34]31,33,3)([35]6,14,4)([36]6,14,2)([37]35,34,4)([38]35,34,2)([39]36,38,3)([40]7,15,4)([41]7,15,2)([42]40,39,4)([43]40,39,2)([44]41,43,3)([45]8,16,4)([46]8,16,2)([47]45,44,4)([48]45,44,2)([49]46,48,3)([50]9,17,4)([51]9,17,2)([52]50,49,4)([53]50,49,2)([54]51,53,3)(11,40,33,32,37,42,47,52,54)"
+
+    c = UnsignedCGPCircuit(cgp, [8, 8], name="cgp_circuit")
+    assert c(0, 0) == 0 #  TypeError: 'int' object is not subscriptable