Made some minor changes and updated creation of MAC circuit.

.testall.sh

@@ -1,5 +1,5 @@
-python generate_test.sh
+python generate_test.py
-python generate_mac.sh
+python generate_mac.py
 cd tests
 bash test_mac.sh
 bash test_circuits.sh

generate_mac.py

@@ -1,4 +1,5 @@
 
+from ariths_gen.core.arithmetic_circuits.arithmetic_circuit import ArithmeticCircuit
 from ariths_gen.core.arithmetic_circuits import GeneralCircuit
 from ariths_gen.wire_components import Bus, Wire
 from ariths_gen.multi_bit_circuits.adders import UnsignedRippleCarryAdder
@@ -6,55 +7,22 @@ from ariths_gen.multi_bit_circuits.multipliers import UnsignedArrayMultiplier
 import os
 
 class MAC(GeneralCircuit):
-    def __init__(self, A:Bus, B:Bus, R:Bus):
+    def __init__(self, A:Bus, B:Bus, R:Bus, prefix= "mac", **kwargs):
-        self.prefix = "mac"
+        super().__init__(prefix=prefix, out_N=2*A.N+1, inputs=[A, B, R], **kwargs)
-        super().__init__([A, B, R])
         assert A.N == B.N
         assert R.N == 2 * A.N
 
+        self.mul = self.add_component(UnsignedArrayMultiplier(a=A, b=B, prefix=self.prefix, inner_component=True))
+        self.add = self.add_component(UnsignedRippleCarryAdder(a=R, b=self.mul.out, prefix=self.prefix, inner_component=True))
+        self.out.connect_bus(connecting_bus=self.add.out)
 
-        if False:
-            # Je zapotřebí zajistit ještě unikátnost jmen podkomponent a jejich vodičů pro správné generování
-            mul_a = Bus(prefix=f"{self.prefix}_mul_a", wires_list=A.bus)
-            mul_b = Bus(prefix=f"{self.prefix}_mul_b", wires_list=B.bus)
-            self.mul = self.add_component(UnsignedArrayMultiplier(a=mul_a, b=mul_b, prefix=f"{self.prefix}_mul"))
-
-            add_a = Bus(prefix=f"{self.prefix}_add_a", N=self.mul.out.N)
-            add_b = Bus(prefix=f"{self.prefix}_add_b", wires_list=R.bus)
-            # Kvůli správnému generování je potřeba správně napojit vodiče mezi mul a add
-            [add_a.connect(o, self.mul.out.get_wire(o), inserted_wire_desired_index=o) for o in range(0, self.mul.out.N)]
-
-            self.add = self.add_component(UnsignedRippleCarryAdder(a=add_a, b=add_b, prefix=f"{self.prefix}_add"))
-
-            # Bylo potřeba upravit definici pro výstupní sběrnici (vázanou na název top level obvodu ("ma") a mající délku jako výstup z adderu)
-            self.out = Bus(self.prefix+"_out", self.add.out.N)
-            
-            # Nakonec je potřeba napojit výstup adderu na výstup mac
-            [self.out.connect(o, self.add.out.get_wire(o), inserted_wire_desired_index=o) for o in range(0, self.out.N)]
-
-        else:
-            # Je zapotřebí zajistit ještě unikátnost jmen podkomponent a jejich vodičů pro správné generování
-            mul_prefix = self.prefix + "_" + UnsignedArrayMultiplier(a=A, b=B).prefix + str(A.N)
-            mul_a = Bus(prefix=f"{mul_prefix}_a", wires_list=A.bus)
-            mul_b = Bus(prefix=f"{mul_prefix}_b", wires_list=B.bus)
-            self.mul = self.add_component(UnsignedArrayMultiplier(a=mul_a, b=mul_b, prefix=mul_prefix))
-
-            add_prefix = self.prefix + "_" + UnsignedRippleCarryAdder(a=R, b=self.mul.out).prefix + str(R.N)
-            add_a = Bus(prefix=f"{add_prefix}_a", N=self.mul.out.N)
-            add_b = Bus(prefix=f"{add_prefix}_b", wires_list=R.bus)
-            # Kvůli správnému generování je potřeba správně napojit vodiče mezi mul a add
-            [add_a.connect(o, self.mul.out.get_wire(o), inserted_wire_desired_index=o) for o in range(0, self.mul.out.N)]
-
-            self.add = self.add_component(UnsignedRippleCarryAdder(a=add_a, b=add_b, prefix=add_prefix))
-
-            # Bylo potřeba upravit definici pro výstupní sběrnici (vázanou na název top level obvodu ("ma") a mající délku jako výstup z adderu)
-            self.out = Bus(self.prefix+"_out", self.add.out.N)
-            
-            # Nakonec je potřeba napojit výstup adderu na výstup mac
-            [self.out.connect(o, self.add.out.get_wire(o), inserted_wire_desired_index=o) for o in range(0, self.out.N)]
 # usage
 os.makedirs("test_circuits/mac", exist_ok=True)
 mymac = MAC(Bus("a",8), Bus("b", 8), Bus("acc", 16))
 mymac.get_v_code_hier(open("test_circuits/mac/mac_hier.v", "w"))
 mymac.get_c_code_hier(open("test_circuits/mac/mac_hier.c", "w"))
 mymac.get_c_code_flat(open("test_circuits/mac/mac_flat.c", "w"))
+
+test = UnsignedRippleCarryAdder(Bus("a",8), Bus("b", 8))
+test.get_v_code_hier(open("test_circuits/urca_hier.v", "w"))
+

generate_test.py

@@ -80,116 +80,116 @@ if __name__ == "__main__":
 
         # RCA
         name = f"u_rca{N}"
-        circuit = UnsignedRippleCarryAdder(a, b, prefix=name)
+        circuit = UnsignedRippleCarryAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         name = f"s_rca{N}"
-        circuit = SignedRippleCarryAdder(a, b, prefix=name)
+        circuit = SignedRippleCarryAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         # RCA with PG
         name = f"u_pg_rca{N}"
-        circuit = UnsignedPGRippleCarryAdder(a, b, prefix=name)
+        circuit = UnsignedPGRippleCarryAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         name = f"s_pg_rca{N}"
-        circuit = SignedPGRippleCarryAdder(a, b, prefix=name)
+        circuit = SignedPGRippleCarryAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         # CSKA with 4 bit CSKA blocks (default)
         name = f"u_cska{N}"
-        circuit = UnsignedCarrySkipAdder(a, b, prefix=name)
+        circuit = UnsignedCarrySkipAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         name = f"s_cska{N}"
-        circuit = SignedCarrySkipAdder(a, b, prefix=name)
+        circuit = SignedCarrySkipAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         # CLA with 4 bit CLA blocks (default)
         name = f"u_cla{N}"
-        circuit = UnsignedCarryLookaheadAdder(a, b, prefix=name)
+        circuit = UnsignedCarryLookaheadAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         name = f"s_cla{N}"
-        circuit = SignedCarryLookaheadAdder(a, b, prefix=name)
+        circuit = SignedCarryLookaheadAdder(a, b, name=name)
         export_circuit(circuit, name)
 
         # Arrmul
         name = f"u_arrmul{N}"
-        circuit = UnsignedArrayMultiplier(a, b, prefix=name)
+        circuit = UnsignedArrayMultiplier(a, b, name=name)
         export_circuit(circuit, name)
 
         name = f"s_arrmul{N}"
-        circuit = SignedArrayMultiplier(a, b, prefix=name)
+        circuit = SignedArrayMultiplier(a, b, name=name)
         export_circuit(circuit, name)
 
         # Wallace
         name = f"u_wallace_cla{N}"
-        circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
+        circuit = UnsignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
         export_circuit(circuit, name)
 
         name = f"s_wallace_cla{N}"
-        circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
+        circuit = SignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
         export_circuit(circuit, name)
 
         name = f"u_wallace_rca{N}"
-        circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
+        circuit = UnsignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"s_wallace_rca{N}"
-        circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
+        circuit = SignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"u_wallace_pg_rca{N}"
-        circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
+        circuit = UnsignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"s_wallace_pg_rca{N}"
-        circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
+        circuit = SignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"u_wallace_cska{N}"
-        circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
+        circuit = UnsignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
         export_circuit(circuit, name)
 
         name = f"s_wallace_cska{N}"
-        circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
+        circuit = SignedWallaceMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
         export_circuit(circuit, name)
 
         # Dadda
         name = f"u_dadda_cla{N}"
-        circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
+        circuit = UnsignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
         export_circuit(circuit, name)
 
         name = f"s_dadda_cla{N}"
-        circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
+        circuit = SignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarryLookaheadAdder)
         export_circuit(circuit, name)
 
         name = f"u_dadda_rca{N}"
-        circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
+        circuit = UnsignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"s_dadda_rca{N}"
-        circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
+        circuit = SignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"u_dadda_pg_rca{N}"
-        circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
+        circuit = UnsignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"s_dadda_pg_rca{N}"
-        circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
+        circuit = SignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder)
         export_circuit(circuit, name)
 
         name = f"u_dadda_cska{N}"
-        circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
+        circuit = UnsignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
         export_circuit(circuit, name)
 
         name = f"s_dadda_cska{N}"
-        circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
+        circuit = SignedDaddaMultiplier(a, b, name=name, unsigned_adder_class_name=UnsignedCarrySkipAdder)
         export_circuit(circuit, name)
 
         # Arrdiv
         name = f"arrdiv{N}"
-        circuit = ArrayDivider(a, b, prefix=name)
+        circuit = ArrayDivider(a, b, name=name)
         export_circuit(circuit, name)