dissertation_thesis/ariths-gen
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Small bugfix in python code generation (I initially thought this line is useless).

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Honza 2022-04-17 13:25:10 +02:00
parent 5d2f4e07e7
commit b1ddc8c387
1 changed files with 4 additions and 0 deletions
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4
ariths_gen/wire_components/wires.py
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@ -41,6 +41,10 @@ class Wire():
""" """
if self.is_const(): if self.is_const():
return f"({self.c_const}) << {offset}\n" return f"({self.c_const}) << {offset}\n"
# If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
# then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
elif self.is_buswire():
return f"(({self.prefix} >> {self.index}) & 0x01) << {offset}\n"
else: else:
return f"(({self.name} >> 0) & 0x01) << {offset}\n" return f"(({self.name} >> 0) & 0x01) << {offset}\n"