From 7f17461d731ca91dae4d16f8cd5469b4220c5370 Mon Sep 17 00:00:00 2001
From: Vojta Mrazek <mrazek@fit.vutbr.cz>
Date: Fri, 13 Dec 2024 12:44:51 +0100
Subject: [PATCH] Update setup.cfg

---
 setup.cfg | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/setup.cfg b/setup.cfg
index ce1a6e7..e5c9ee8 100644
--- a/setup.cfg
+++ b/setup.cfg
@@ -1,8 +1,19 @@
 [metadata]
 name = ariths_gen
-version = 0.0.2
-description = "arithmetic circuits generator"
+description = Arithmetic circuits generator to Verilog, BLIF, C etc.
+long_description = file: README.md
+long_description_content_type = text/markdown
+
+
+license = MIT
+author = Jan Klhufek, Vojtech Mrazek
+author_email = iklhufek@fit.vutbr.cz
+url = https://github.com/ehw-fit/ariths-gen
+download_urls = https://pypi.org/project/ariths-gen
+project_urls =
+	Code = https://github.com/ehw-fit/ariths-gen
+	Issue tracker = https://github.com/ehw-fit/ariths-gen/issues
 
 
 [options]
-packages = find:
\ No newline at end of file
+packages = find: