diff --git a/.github/workflows/generate.yml b/.github/workflows/generate.yml new file mode 100644 index 0000000..f6e1558 --- /dev/null +++ b/.github/workflows/generate.yml @@ -0,0 +1,42 @@ +# This is a basic workflow to help you get started with Actions + +name: BUILD + +# Controls when the action will run. +on: + # Triggers the workflow on push or pull request events but only for the main branch + push: + pull_request: + + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +# A workflow run is made up of one or more jobs that can run sequentially or in parallel +jobs: + # This workflow contains a single job called "build" + build: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v2 + - name: Set up Python 3.x + uses: actions/setup-python@v2 + with: + # Semantic version range syntax or exact version of a Python version + python-version: '3.x' + # Optional - x64 or x86 architecture, defaults to x64 + architecture: 'x64' + # You can test your matrix by printing the current Python version + - name: Display Python version + run: python -c "import sys; print(sys.version)" + - name: Run generating + run: python ariths_gen.py + - name: Listing + run: ls build + - name: Listing2 + run: ls + + - name: Upload results + uses: actions/upload-artifact@v1.0.0 + with: + name: arithmetic-circuits + path: build \ No newline at end of file diff --git a/ariths_gen.py b/ariths_gen.py index 81ebc6b..ea21384 100644 --- a/ariths_gen.py +++ b/ariths_gen.py @@ -35,6 +35,8 @@ from ariths_gen.multi_bit_circuits.multipliers import( SignedDaddaMultiplier, SignedWallaceMultiplier ) +import sys +import os """ Generation of circuits """ @@ -42,77 +44,79 @@ if __name__ == "__main__": N = 8 a = Bus(N=N, prefix="a") b = Bus(N=N, prefix="b") + directory = "build" + os.makedirs(directory, exist_ok = True) + representation = "h" # RCA name = f"{representation}_u_rca{N}" circuit = UnsignedRippleCarryAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_rca{N}" circuit = SignedRippleCarryAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) #RCA with PG name = f"{representation}_u_pg_rca{N}" circuit = UnsignedPGRippleCarryAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_pg_rca{N}" circuit = SignedPGRippleCarryAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) #CLA with PG name = f"{representation}_u_cla{N}" circuit = UnsignedCarryLookaheadAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_cla{N}" circuit = SignedCarryLookaheadAdder(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) # Arrmul name = f"{representation}_u_arrmul{N}" circuit = UnsignedArrayMultiplier(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_arrmul{N}" circuit = SignedArrayMultiplier(a, b, prefix=name) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) # Wallace name = f"{representation}_u_wallace_rca{N}" circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_wallace_rca{N}" circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_u_wallace_pg_rca{N}" circuit = UnsignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_wallace_pg_rca{N}" circuit = SignedWallaceMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) # Dadda name = f"{representation}_u_dadda_rca{N}" circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_dadda_rca{N}" circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_u_dadda_pg_rca{N}" circuit = UnsignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w")) name = f"{representation}_s_dadda_pg_rca{N}" circuit = SignedDaddaMultiplier(a, b, prefix=name, unsigned_adder_class_name=UnsignedPGRippleCarryAdder) - circuit.get_v_code_hier(open(f"{name}.v", "w")) - + circuit.get_v_code_hier(open(f"{directory}/{name}.v", "w"))