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https://github.com/ehw-fit/ariths-gen.git
synced 2025-04-08 08:12:11 +01:00
fix bug in python interpretation
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@ -127,7 +127,7 @@ class Bus():
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# Ensures correct binding between the bus wire index and the wire itself
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# It is used for the case when multiple of the same wire (e.g. `ContantWireValue0()`) are present in the bus (its id would otherwise be incorrect when using `self.bus.index(_)`)
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mapped_positions = [(w_id, self.bus[w_id]) for w_id in range(self.N)]
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return "".join([f" {self.prefix} = 0\n"] + [f" {self.prefix} |= {w[1].return_wire_value_python_flat(offset=w[0])}" for w in mapped_positions])
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return "".join([f" {self.prefix} = 0\n"] + [f" {self.prefix} = ({self.prefix}) | {w[1].return_wire_value_python_flat(offset=w[0])}" for w in mapped_positions])
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def return_bus_wires_sign_extend_python_flat(self):
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"""Sign extends the bus's corresponding Python variable (object) to ensure proper flat Python code variable signedness.
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@ -137,7 +137,7 @@ class Bus():
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"""
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if self.signed is True:
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last_bus_wire = self.bus[-1]
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return "".join([f" {self.prefix} |= {last_bus_wire.return_wire_value_python_flat(offset=i)}" for i in range(len(self.bus), 64)])
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return "".join([f" {self.prefix} = ({self.prefix}) | {last_bus_wire.return_wire_value_python_flat(offset=i)}" for i in range(len(self.bus), 64)])
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else:
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return ""
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@ -40,13 +40,13 @@ class Wire():
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str: Python code bitwise shift for storing (constant/variable) wire value at desired offset position.
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"""
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if self.is_const():
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return f"({self.c_const}) << {offset}\n"
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return f"(({self.c_const}) << {offset})\n"
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# If wire is part of an input bus (where wire names are concatenated from bus prefix and their index position inside the bus in square brackets)
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# then the wire value is obtained from bitwise shifting the required wire from the parent bus ('parent_bus.prefix' is the same value as 'self.prefix')
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elif self.is_buswire():
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return f"(({self.prefix} >> {self.index}) & 0x01) << {offset}\n"
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return f"((({self.prefix} >> {self.index}) & 0x01) << {offset})\n"
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else:
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return f"(({self.name} >> 0) & 0x01) << {offset}\n"
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return f"((({self.name} >> 0) & 0x01) << {offset})\n"
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""" C CODE GENERATION """
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def get_declaration_c(self):
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@ -35,6 +35,17 @@ from ariths_gen.multi_bit_circuits.approximate_multipliers import (
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UnsignedBrokenArrayMultiplier,
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UnsignedBrokenCarrySaveMultiplier
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)
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from ariths_gen.one_bit_circuits.logic_gates import (
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AndGate,
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NandGate,
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OrGate,
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NorGate,
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XorGate,
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XnorGate,
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NotGate
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)
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import numpy as np
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@ -163,4 +174,33 @@ def test_mac():
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r = mymac(av, bv, cv)
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expected = (av * bv) + cv
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np.testing.assert_array_equal(r, expected)
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np.testing.assert_array_equal(r, expected)
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def test_direct():
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class err_circuit(GeneralCircuit):
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def __init__(self, prefix: str = "", name: str = "adder", inner_component: bool = True, a: Bus = Bus(), b: Bus = Bus()):
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super().__init__(prefix = prefix, name=name, out_N = (a.N + 1), inner_component=inner_component, inputs = [a, b])
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self.N = 1
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self.prefix = prefix
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self.a = Bus(prefix=a.prefix, wires_list=a.bus)
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self.b = Bus(prefix=b.prefix, wires_list=b.bus)
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self.out = Bus(self.prefix+"_out", self.N+1)
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a_0 = self.a.get_wire(0)
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b_0 = self.b.get_wire(0)
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or_1 = OrGate(a_0, b_0, prefix=self.prefix+"_or"+str(self.get_instance_num(cls=OrGate)), parent_component=self)
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self.add_component(or_1)
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self.out.connect(0, a_0)
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self.out.connect(1, or_1.out)
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av = np.arange(0, 4).reshape(1, -1)
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bv = np.arange(0, 4).reshape(-1, 1)
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example = err_circuit(prefix = "err_circuit", a = Bus("a", 2) , b = Bus("b", 2))
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r = example(av, bv)
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expected = np.array([[0, 3, 0, 3], [2, 3 ,2, 3], [0, 3, 0, 3], [2, 3, 2, 3]])
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np.testing.assert_equal(r, expected)
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print(r)
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