TableForMTAndAG/MTCodes/passMig.cpp
Lukas Plevac b7f83bfed2 Init
2024-11-16 21:06:27 +01:00

34 lines
888 B
C++

#include <lorina/aiger.hpp>
#include <lorina/bench.hpp>
#include <lorina/blif.hpp>
#include <lorina/pla.hpp>
#include <lorina/verilog.hpp>
#include <mockturtle/mockturtle.hpp>
#include <lorina/diagnostics.hpp>
class diagnostics : public lorina::diagnostic_consumer
{
public:
void handle_diagnostic( lorina::diagnostic_level level, std::string const& message ) const override {
printf("[%d] %s\n", int(level), message.c_str());
}
}; /* diagnostics */
int main() {
mockturtle::mig_network mig;
diagnostics consumer;
lorina::diagnostic_engine diag( &consumer );
auto const result = lorina::read_verilog("adder.v", mockturtle::verilog_reader(mig), &diag);
if ( result != lorina::return_code::success ) {
std::cout << "Read Verilog failed " << int(result) << "\n";
return 1;
}
// output
mockturtle::write_verilog(mig, "mig.v");
return 0;
}